The present disclosure herein relates to a semiconductor device and a method of fabricating the semiconductor device.
As semiconductors are highly integrated, various types of research have been carried out to address technical limitations of photolithography processes. For example, a single level cell is changed to a multi level cell to address these limitations. While a unit cell has two states of on/off in a single level cell, a unit cell can have four states or eight or more states in a multi level cell. Because a minute difference between threshold voltages of the cell is sensed for driving in such a multi level cell, an accurate control may be necessary. The reliability of a semiconductor device including such a multi level cell, particularly during programming and erasing, is significantly affected by a trap site formed at an interface of a tunnel oxide layer and a silicon substrate, or a component of an interlayer dielectric functioning as a source of a trap site. Specifically, source gas containing a large amount of hydrogen may be used in a back end process during manufacturing of a semiconductor device. In this case, hydrogen may diffuse and be trapped in a tunnel oxide layer, which may degrade the reliability of a semiconductor device.